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Hardware » Books » Developer »
MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30)
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1.6 R10000 Pipelines
Stage 3
In stage 3, decoded instructions are written into the queues. Stage 3 is also the start of each of the five execution pipelines.
Copyright 1996, 1997, MIPS Technologies, Inc. -- 09 DEC 96
  
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MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30)
table of contents | additional info | download
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