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MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30)    table of contents  |  additional info  |  download
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13.1 R10000 Single-Chip Package, 599CLGA

Electrical Characteristics

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The 599CLGA uses multilayer construction, incorporating stripline configuration for signals. Multiple planes distribute power and ground throughout the package and provide built-in distributed bypass/coupling capacitance between the primary power supplies: Vcc, VccQSC, VccQSys, and Vss.

Pads are present on the package body for attaching chip-capacitors to provide additional bypass capacitance between the primary power supplies and the PLL power supply (VccPa and VssPa), and to provide an additional PLL loop filter capacitor (PLLRC). Chip-capacitors on the R10000 are assembled by the chip manufacturer.

Detailed electrical package characteristics will be provided by the MIPS Semiconductor Partners as they become available. The data in Table 13-1 is provided as an estimate of the package parasitics. These estimates include the effects of bondwires, package traces and vias, but not the sockets.

Table 13-1 R10000 599CLGA Electrical Characteristics

The copper-tungsten slug (provided for thermal performance) is hard-connected to Vss to minimize EMI radiation from the package.

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Copyright 1996, 1997, MIPS Technologies, Inc. -- 09 DEC 96

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MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30)    table of contents  |  additional info  |  download

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