SGI

SGI

Contact Us    How to Buy    Worldwide
Products
Solutions
Support
Partners
Ask a Sales Rep
SGI Techpubs Library

Hardware  »  Books  »  Developer  »  
MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30)    table of contents  |  additional info  |  download
find in page

1. Introduction to the R10000 Processor

1.5 Program Order and Dependencies


From a programmer's perspective, instructions appear to execute sequentially, since they are fetched and graduated in program order (the order they are presented to the processor by software). When an instruction stores a new value in its destination register, that new value is immediately available for use by subsequent instructions.

Internal to the processor, however, instructions are executed dynamically, and some results may not be available for many cycles; yet the hardware must behave as if each instruction is executed sequentially.

This section describes various conditions and dependencies that can arise from them in pipeline operation, including:

  • instruction dependencies
  • execution order and stalling
  • branch prediction and speculative execution
  • resolving operand dependencies
  • resolving exception dependencies



Copyright 1996, 1997, MIPS Technologies, Inc. -- 09 DEC 96


Generated with CERN WebMaker

MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30)    table of contents  |  additional info  |  download


home/search | what's new | help



About SGI     Privacy     Terms of Use    
© 2009 - 2011 Silicon Graphics International Corp. All Rights Reserved.