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MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30)    table of contents  |  additional info  |  download
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R10000 Microprocessor User's Manual


11. JTAG Interface Operation


The
JTAG interface is implemented according to the standard IEEE 1149.1 test access port protocol specifications.


The JTAG interface accesses the JTAG controller and instruction register as well as a boundary scan register. The JTAG operation does not require DCOk to be asserted or SysClk to be running; however, if DCOk is asserted the SysClk must run at the specified minimum frequency or the core logic may be damaged.



Chapter Contents

11.1 - Test Access Port (TAP)
11.2 - Instruction Register
11.3 - Bypass Register
11.4 - Boundary Scan Register


Copyright 1996, 1997, MIPS Technologies, Inc. -- 09 DEC 96


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MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30)    table of contents  |  additional info  |  download


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