SGI

SGI

Contact Us    How to Buy    Worldwide
Products
Solutions
Support
Partners
Ask a Sales Rep
SGI Techpubs Library

Hardware  »  Books  »  Developer  »  
MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30)    table of contents  |  additional info  |  download
find in page

1.4 Instruction Queues

Integer Queue


The integer queue issues instructions to the two integer arithmetic units: ALU1 and ALU2.

The integer queue contains 16 instruction entries. Up to four instructions may be written during each cycle; newly-decoded integer instructions are written into empty entries in no particular order. Instructions remain in this queue only until they have been issued to an ALU.

Branch and shift instructions can be issued only to ALU1. Integer multiply and divide instructions can be issued only to ALU2. Other integer instructions can be issued to either ALU.

The integer queue controls six dedicated ports to the integer register file: two operand read ports and a destination write port for each ALU.




Copyright 1996, 1997, MIPS Technologies, Inc. -- 09 DEC 96


Generated with CERN WebMaker

MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30)    table of contents  |  additional info  |  download


home/search | what's new | help



About SGI     Privacy     Terms of Use    
© 2009 - 2011 Silicon Graphics International Corp. All Rights Reserved.