9.2 Uncorrectable Errors

Uncorrectable errors consist of:

Primary instruction cache array parity errors
Primary data cache array parity errors
Secondary cache tag array uncorrectable ECC errors
Secondary cache data array uncorrectable ECC errors
System interface command bus parity errors
System interface address/data bus uncorrectable ECC errors
System interface response bus parity errors

When the processor detects an uncorrectable error, a Cache Error exception is posted. In general, the detection of an uncorrectable error does not disrupt any ongoing operations. However, the instruction fetch and load/store units never use data which contains an uncorrectable error.

To inform the external agent, the processor asserts SysUncErr* for one SysClk cycle whenever any of the following uncorrectable errors are detected:

Primary instruction cache tag array parity errors
Primary data cache tag array parity errors
Secondary cache tag array uncorrectable ECC errors
System interface command bus parity errors
System interface address/data bus external address cycle uncorrectable ECC errors
System interface response bus parity errors.

The processor informs the external agent that an uncorrectable tag error has been detected by asserting SysUncErr* for one SysClk cycle.

Generated with CERN WebMaker

MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30) table of contents | additional info | download

home/search | what's new | help