External Coherency Conflicts
A processor request is considered to be pending response when it has been issued to the System interface bus but has not yet received an external data or completion response. External coherency conflicts occur when the processor has a processor request that is pending response and a conflicting external coherency request is received. The processor relies on the external agent to detect and resolve external coherency conflicts. If the external agent chooses to issue an external coherency request to the processor which causes an external coherency conflict, the external coherency request must be completed before an external response is given to the conflicting processor request.
External coherency conflicts may be avoided if the point of coherence is the processor System interface bus and only one request is allowed to be outstanding for any given secondary cache block. However, in some system designs external coherency conflicts are unavoidable.
Processor block write and eliminate requests are never pending response, and therefore cannot cause external coherency conflicts.
Table 6-29 describes the manner in which the external agent resolves external coherency conflicts.
Table 6-29 External Coherency Conflict Resolution
Revised the two footnotes in Table 6-29 above.
