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Hardware » Books » Developer »
MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30)
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6. System Interface Operations
6.14 Interrupts
The processor supports five hardware, two software, one timer, and one nonmaskable interrupt. The Interrupt exception is described in Chapter 17, the section titled "Interrupt Exception."
Copyright 1996, 1997, MIPS Technologies, Inc. -- 09 DEC 96
  
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MIPS R10000 Microprocessor User Guide, Version 2.0
(document number: 007-2490-001 / published: 1997-01-30)
table of contents | additional info | download
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